Abstract
In order to achieve fast parallel processing operation by a neural network, it is desirable to implement all neurons in parallel in hardware rather than to realize operation by serial operation in software. The authors have proposed a pulsed neural network based on ΔΣ modulation which is suited to the hardware implementation of digital circuits. The proposed neural network can be realized on a small circuit scale, since the variable can be represented by a ΔΣ‐modulated 1‐bit pulse signal. Highly accurate operation can be realized even though only 1 bit is used. This paper proposes a hardware implementation of the above neural network. A neural network with built‐in GHA learning rule is hardware implemented on an FPGA, and its operation is investigated. The proposed neural network and CPU are implemented on an FPGA and are compared in terms of the number of bits that can be processed in unit time per unit of circuit scale. The proposed scheme achieved an evaluation score 200 times as great as a software realization on a CPU. © 2005 Wiley Periodicals, Inc. Syst Comp Jpn, 36(9): 14–24, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/scj.20235