Protocol Specification, Testing and Verification XV: Proceedings of the Fifteenth IFIP WG6.1 International Symposium on Protocol Specification, Testing and Verification, Warsaw, Poland, June 1995

✍ Scribed by Piotr Dembiński, Marek Średniawa (eds.)

Publisher: Springer US
Year: 1996
Tongue: English
Leaves: 452
Series: IFIP Advances in Information and Communication Technology
Category: Library

No coin nor oath required. For personal study only.

✦ Table of Contents

Front Matter....Pages i-xi
Front Matter....Pages 1-1
Simple On-the-fly Automatic Verification of Linear Temporal Logic....Pages 3-18
Specifying Real-Time Requirements for SDL Specifications — A Temporal Logic-Based Approach....Pages 19-34
A temporal reachability analysis....Pages 35-49
True versus artificial concurrency....Pages 53-68
Front Matter....Pages 69-69
On compositionality and Petri nets in protocol engineering....Pages 71-86
Composition of LOTOS specifications....Pages 87-102
Front Matter....Pages 103-103
Principles for validation of abstract test suites specified in concurrent TTCN....Pages 105-120
An approach to testing distributed software systems....Pages 121-136
Modeling Basic LOTOS by FSMs for Conformance Testing....Pages 137-152
Front Matter....Pages 153-153
The Specification and Verification of an Experimental ATM Signalling Protocol....Pages 155-170
Re-Usable Verification Elements for High-Speed Transfer Protocol Configurations....Pages 171-186
An Algebraic-Temporal Specification of a CSMA/CD-Protocol....Pages 187-202
Front Matter....Pages 203-203
Validation, verification and implementation of timed protocols using AORTA....Pages 205-220
Validation in Context....Pages 221-236
Characterizing Termination in LOTOS via Testing....Pages 237-250
Front Matter....Pages 251-251
Quantified reduced views of state graphs using Markovian and timed observational equivalence....Pages 253-268
SDL and Petri Net Performance Analysis of Communicating Systems....Pages 269-282
On the introduction of gate typing in E-LOTOS....Pages 283-298
Front Matter....Pages 299-299
An analysis of bitstate hashing....Pages 301-314
Using Asynchronous Büchi Automata for Efficient Automatic Verification of Concurrent Systems....Pages 315-330
Front Matter....Pages 299-299
A method to build symbolic representations of LOTOS specifications....Pages 331-346
Formal Design of Cooperative Systems....Pages 349-365
Front Matter....Pages 367-367
On the suitability of Estelle for multimedia systems....Pages 369-384
Protocol analysis and verification methods, application to the Xpress Transport Protocol 4.0....Pages 385-400
Front Matter....Pages 401-401
PARES - A Portable Parallel Estelle Compiler....Pages 403-418
A methodology for the implementation of protocols in hardware from a formal description....Pages 419-434
Hardware Specification Generated from Estelle....Pages 435-450
Back Matter....Pages 451-455

✦ Subjects

Signal, Image and Speech Processing; Computer Communication Networks

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