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Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic

✍ Scribed by Bryant, Randal E.; German, Steven; Velev, Miroslav N.

Book ID: 120639988
Publisher: Association for Computing Machinery
Year: 2001
Tongue: English
Weight: 312 KB
Volume: 2
Category: Article
ISSN: 1529-3785
DOI: 10.1145/371282.371364

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