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[Presses Polytech. Univ. Romandes ISCAS 2000 Geneva. 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings - Geneva, Switzerland (28-31 May 2000)] 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353) - Automated transistor sizing algorithm for minimizing spurious switching activities in CMOS circuits

✍ Scribed by Wroblewski, A.; Schimpfle, C.V.; Nossek, J.A.

Book ID: 111989318
Publisher: Presses Polytech. Univ. Romandes
Year: 2000
Weight: 395 KB
Edition: 2000
Volume: 3
Category: Article
ISBN-13: 9780780354821
DOI: 10.1109/iscas.2000.856054

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