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Predictive worst case statistical modeling of 0.8-μm BICMOS bipolar transistors: a methodology based on process and mixed device/circuit level simulators

✍ Scribed by Kizilyalli, I.C.; Ham, T.E.; Singhal, K.; Kearney, J.W.; Lin, W.; Thoma, M.J.


Book ID
114535118
Publisher
IEEE
Year
1993
Tongue
English
Weight
821 KB
Volume
40
Category
Article
ISSN
0018-9383

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