Power- and complexity-aware issue queue designs

Guest editors' introduction: Power and c

Guest editors' introduction: Power and complexity aware design

✍ Bose, P.; Albonesi, D.H.; Marculescu, D. 📂 Article 📅 2003 🏛 IEEE 🌐 English ⚖ 688 KB

Queue length aware power control for del

Queue length aware power control for delay- constrained communication over fading channels

✍ Xiaochen Li; Xihua Dong; Dapeng Wu 📂 Article 📅 2010 🏛 John Wiley and Sons 🌐 English ⚖ 212 KB

Power-Aware Testing and Test Strategies

Power-Aware Testing and Test Strategies for Low Power Devices || Test Strategies for Gated Clock Designs

✍ Girard, Patrick; Nicolici, Nicola; Wen, Xiaoqing 📂 Article 📅 2009 🏛 Springer US 🌐 English ⚖ 676 KB

Managing the power consumption of circuits and systems is now considered one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as dynamic voltage scaling, clock gating or power gating techniques, are used today to control the power dissipati

Queue-Aware Dynamic Clustering and Power

Queue-Aware Dynamic Clustering and Power Allocation for Network MIMO Systems via Distributed Stochastic Learning

✍ Ying Cui; Qingqing Huang; Lau, V.K.N. 📂 Article 📅 2011 🏛 IEEE 🌐 English ⚖ 926 KB

Power-Aware Testing and Test Strategies

Power-Aware Testing and Test Strategies for Low Power Devices || Power Issues During Test

✍ Girard, Patrick; Nicolici, Nicola; Wen, Xiaoqing 📂 Article 📅 2009 🏛 Springer US 🌐 English ⚖ 975 KB

Managing the power consumption of circuits and systems is now considered one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as dynamic voltage scaling, clock gating or power gating techniques, are used today to control the power dissipati

Parasitic-aware design and optimisation

Parasitic-aware design and optimisation of RF power amplifiers

✍ Choi, K.; Allstot, D.J. 📂 Article 📅 2002 🏛 The Institution of Electrical Engineers 🌐 English ⚖ 628 KB