✦ LIBER ✦

POSET timing and its application to the synthesis and verification of gate-level timed circuits

✍ Scribed by Myers, C.J.; Rokicki, T.G.; Meng, T.H.-Y.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Verification of 1D BJT numerical simulat

✍ Chia-Cherng Chang; Jing-Fu Dai; Yao-Tsung Tsai 📂 Article 📅 2003 🏛 John Wiley and Sons 🌐 English ⚖ 346 KB

Applicative theories for the polynomial

✍ Kahle, Reinhard; Oitavem, Isabel 📂 Article 📅 2013 🏛 Elsevier Science 🌐 English ⚖ 249 KB

Application of Prony's method to time-do

✍ D. Schaubert 📂 Article 📅 1979 🏛 IEEE 🌐 English ⚖ 413 KB

Synthesis of a Terbium Fluorescent Chela

✍ Yuan, Jingli; Wang, Guilan; Majima, Keisuke; Matsumoto, Kazuko 📂 Article 📅 2001 🏛 American Chemical Society 🌐 English ⚖ 112 KB

Robust Control of Continuous-Time System

✍ Zhao, Xudong; Zhang, Lixian; Shi, Peng; Karimi, Hamid Reza 📂 Article 📅 2014 🏛 IEEE 🌐 English ⚖ 553 KB

Asymptotic harmonic generator and its ap

✍ Orlov, Y.; Aguilar, L. T.; Acho, L.; Ortiz, A. 📂 Article 📅 2008 🏛 Taylor and Francis Group 🌐 English ⚖ 897 KB