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Performances of the Delay-Line Multiplier Circuit for Clock and Carrier Synchronization in Digital Satellite Communications

✍ Scribed by Imbeaux, J.-C.

Book ID: 119794922
Publisher: IEEE
Year: 1983
Tongue: English
Weight: 903 KB
Volume: 1
Category: Article
ISSN: 0733-8716
DOI: 10.1109/jsac.1983.1145909

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