𝔖 Bobbio Scriptorium
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Performance/Availability Model of Shared Resource Multiprocessors

✍ Scribed by Chou, T.C.K.; Abraham, J.A.


Book ID
117934121
Publisher
IEEE
Year
1980
Tongue
English
Weight
878 KB
Volume
R-29
Category
Article
ISSN
0018-9529

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The latest processor generations-e.g., HPPA 8000, MIPS R10000 or Ultra SPARC-include a monitoring unit. A processor monitor can count events like read/write cache misses and processor stall cycles due to load and store operations. This information is usually only used for offline profiling. However,