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Parallel Adder Design with Reduced Circuit Complexity Using Resonant Tunneling Transistors and Threshold Logic

✍ Scribed by Christian Pacha; Oliver Kessler; Peter Glo¨seko¨tter; Karl F. Goser; Werner Prost; Andreas Brennemann; Uwe Auer; Franz J. Tegude


Book ID
110262427
Publisher
Springer
Year
2000
Tongue
English
Weight
342 KB
Volume
25
Category
Article
ISSN
0925-1030

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