๐”– Bobbio Scriptorium
โœฆ   LIBER   โœฆ

Packaging design concept simulator for electronic circuit

โœ Scribed by Toosaku Kojima; Tazu Nomoto


Publisher
John Wiley and Sons
Year
2000
Tongue
English
Weight
360 KB
Volume
31
Category
Article
ISSN
0882-1666

No coin nor oath required. For personal study only.

โœฆ Synopsis


When designing a printed circuit board, details of the composition of packaging such as the numbers of layers and channels could not be easily determined; therefore, when the design process proceeded to designing a package, trialand-error processes were often repeated because of the indefinite numbers of layers and channels. Consequently, the design period can be effectively shortened by quantitatively estimating the configuration of the package when a circuit is designed, because it can prevent the problem that after a circuit is designed, the wiring cannot be accommodated in a package and the circuit must be redesigned. The authors established a technology for estimating and evaluating the difficulty of a package depending on a channel requirement ratio. In addition, the authors increased the accuracy of estimation by referring to a database that stores the details of successful packages, indexed according to the configuration. However, several types of package configurations must be selected. Therefore, an index of the number of disabled channels has been introduced as a disturbance factor to wiring patterns, and the wiring detour ratio and an aspect ratio of board were also taken into account, so that a total length of wiring can be estimated precisely, and an optimum package configuration can be selected with a minimum total length of wiring. Therefore, the authors are convinced that the period for developing a printed circuit board can be shortened, using the technique developed by them.


๐Ÿ“œ SIMILAR VOLUMES


Guided-mode extracted boundary integral
โœ Kiyofumi Katayama; Masahiro Tanaka; Kazuo Tanaka ๐Ÿ“‚ Article ๐Ÿ“… 2000 ๐Ÿ› John Wiley and Sons ๐ŸŒ English โš– 311 KB ๐Ÿ‘ 1 views

This paper derives the guided-mode extracted boundary integral equation (GMEIE) for the basic theory of computer-aided design of complex electron waveguide circuits. The derived integral equation is amenable to direct numerical analysis by the method of moments (boundary element method) without usin