Optimal signature sets for oversaturated quasi-scalable direct-sequence spread-spectrum systems

Optimal design of an all-digital chip ti

Optimal design of an all-digital chip timing recovery loop for direct-sequence spread-spectrum systems

✍ Hasson, Jaime ;Bobrovsky, Ben Zion 📂 Article 📅 2005 🏛 John Wiley and Sons 🌐 English ⚖ 198 KB

Noncoherent digital delay lock loops (DDLL) are suited for chip timing synchronisation in band-limited direct-sequence spread-spectrum (DSSS) demodulators. The diffusion approximation and the singular perturbation method are used in this paper to calculate the mean time to lose lock (MTLL) of the DD