On the models for designing VLSI asynchronous digital systems

✍ Scribed by Tam-Anh Chu

• Publisher: Elsevier Science
• Year: 1986
• Tongue: English
• Weight: 910 KB
• Volume: 4
• Category: Article
• ISSN: 0167-9260
• DOI: 10.1016/s0167-9260(86)80002-5

✦ Synopsis

Designing asynchronous circuits in a large scale using the traditional approaches is impractical because it is difficult to control the relative delays of logic components. This problem is especially severe in VLSI circuits as one has even less control over the critical delays. We present two well-known traditional models for asynchronous circuits, namely, the Finite State Machines and Petri Nets, and discuss the reasons for their failure in VLSI applications. A new model for designing large asynchronous systems is briefly proposed and a practical design example is presented.