✦ LIBER ✦
On-chip built-in jitter measurement circuit for PLL based on duty-cycle modulation vernier delay line
✍ Scribed by Yu, Fei; Lee, Chung Len; Zhang, Jingkai
- Book ID
- 108485046
- Publisher
- Bioline International
- Year
- 2007
- Tongue
- English
- Weight
- 197 KB
- Volume
- 12
- Category
- Article
- ISSN
- 1007-0214
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