✦ LIBER ✦
Novel design of the output stage for four-phase dynamic VLSI logic
✍ Scribed by D.C. Patel
- Publisher
- Elsevier Science
- Year
- 1984
- Tongue
- English
- Weight
- 202 KB
- Volume
- 15
- Category
- Article
- ISSN
- 0026-2692
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✦ Synopsis
A novel output stage design for four-phase rstioless dynamic logic is proposed for a low speed asynchronous pump circuit. The main features of the proposed circuit are that the precharge capacitance is reduced significantly, leading to lower power consumption, and the circuit can operate in the synchronous mode. Although more transistors are used in the circuit, there is no increase in the chip area.