New logical-sum and logical-product circuits using CMOS transistors and their applications to four-valued combinational circuits: T Watanabe, M Matsumoto, T Li (Dept. of Electr. Eng., Fac. of Eng., Tokyo Univ., Saitama, Japan) Int. J. Electron. (GB), vol. 63, no. 2, pp. 215–227 (Aug. 1987)