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Nano-CMOS and post-CMOS electronics : circuits and design, Volume 2

✍ Scribed by Mohanty, Saraju P.; Srivastava, Ashok N


Publisher
The Institution of Engineering and Technology
Year
2016
Tongue
English
Leaves
439
Series
Materials Circuits and Devices 30
Category
Library

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✦ Synopsis


Continuing from volume 1, this volume outlines circuit- and system-level design approaches and issues for these devices.

Topics covered include self-healing analog/RF circuits; on-chip gate delay variability measurement in scaled technology; FinFET SRAM circuits; nanoscale FinFET devices for PVT aware SRAM; low leakage variability aware CMOS logic circuits; thermal effects in MWCNT VLSI interconnects; an accurate PVT-aware statistical logic library for nano-CMOS integrated circuits; SPICEless RTL design optimization of nano-electronic digital integrated circuits; power-delay trade-off driven optimal scheduling of CDFGs during high level synthesis; green on-chip inductors for three-dimensional integrated circuits; 3D NoC -- a promising alternative for tomorrow’s nano-system design; and DNA computing

✦ Table of Contents


Content: Preface --
1. Self-healing analog/RF circuits --
2. On-chip gate delay variability measurement in scaled technology node --
3. Nanoscale FinFET devices for PVT-aware SRAM --
4. Data stability and write ability enhancement techniques for FinFET SRAM circuits --
5. Low-leakage techniques for nanoscale CMOS circuits --
6. Thermal effects in carbon nanotube VLSI interconnects --
7. Lumped electro-thermal modeling and analysis of carbon nanotube interconnects --
8. High-level synthesis of digital integrated circuits in the nanoscale mobile electronics era.


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