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Morphology Optimization for the Fabrication of High Mobility Thin-Film Transistors

โœ Scribed by Xiangnan Sun; Lei Zhang; Chong-an Di; Yugeng Wen; Yunlong Guo; Yan Zhao; Gui Yu; Yunqi Liu


Publisher
John Wiley and Sons
Year
2011
Tongue
English
Weight
881 KB
Volume
23
Category
Article
ISSN
0935-9648

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W and L are, respectively, the semiconductor channel width and length, C i is the capacitance per unit area of the gate dielectric layer, and V G and V T are, respectively, the gate voltage and threshold voltage. V T of the device was determined from the relationship between the square root of I SD