Models for Large Integrated Circuits

✍ Scribed by Patrick Dewilde, Zhen-Qui Ning (auth.)

• Publisher: Springer US
• Year: 1990
• Tongue: English
• Leaves: 227
• Series: The Kluwer International Series in Engineering and Computer Science 103
• Edition: 1
• Category: Library

✦ Synopsis

A modern microelectronic circuit can be compared to a large construction, a large city, on a very small area. A memory chip, a DRAM, may have up to 64 million bit locations on a surface of a few square centimeters. Each new generation of integrated circuit- generations are measured by factors of four in overall complexity -requires a substantial increase in density from the current technology, added precision, a decrease of the size of geometric features, and an increase in the total usable surface. The microelectronic industry has set the trend. Ultra large funds have been invested in the construction of new plants to produce the ultra large-scale circuits with utmost precision under the most severe conditions. The decrease in feature size to submicrons -0.7 micron is quickly becoming availabl- does not only bring technological problems. New design problems arise as well. The elements from which microelectronic circuits are build, transistors and interconnects, have different shape and behave differently than before. Phenomena that could be neglected in a four micron technology, such as the non-uniformity of the doping profile in a transistor, or the mutual capacitance between two wires, now play an important role in circuit design. This situation does not make the life of the electronic designer easier: he has to take many more parasitic effects into account, up to the point that his ideal design will not function as originally planned.

✦ Table of Contents

Front Matter....Pages i-xiii
Introduction....Pages 1-38
Boundary Value Problems in VLSI Modeling....Pages 39-51
Green’s Function for Stratified Media....Pages 53-70
Galerkin Boundary Finite Elements....Pages 71-95
Point Collocation and Further Simplifications....Pages 97-105
Reduced Models....Pages 107-136
Hierarchical Reduced Models....Pages 137-146
On the Modeling of a Short-Channel MOSFET below Threshold....Pages 147-156
Parasitic Capacitances and Their Linear Approximation....Pages 157-167
Interconnection Resistances....Pages 169-184
Hybrid Finite Elements....Pages 185-196
Appendices....Pages 197-214
Back Matter....Pages 215-219

✦ Subjects

Electrical Engineering;Signal, Image and Speech Processing