✦ LIBER ✦

Modeling and analysis of fault tolerant multistage interconnection networks

✍ Scribed by Minsu Choi; Park, N.; Lombardi, F.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Fault-Tolerant Multistage Interconnectio

✍ S.M. Bataineh; B.Y. Allosl 📂 Article 📅 2001 🏛 Springer US 🌐 English ⚖ 203 KB

Fault-tolerant routing in unique-path mu

✍ Anujan Varma 📂 Article 📅 1989 🏛 Elsevier Science 🌐 English ⚖ 711 KB

On a fault-tolerant multistage interconn

✍ P.K. Bansal; R.C. Joshi; Kuldip Singh 📂 Article 📅 1994 🏛 Elsevier Science 🌐 English ⚖ 632 KB

Reliability and fault-tolerance in multi

✍ C. S. Raghavendra; Anujan Varma 📂 Article 📅 1987 🏛 Indian Academy of Sciences 🌐 English ⚖ 929 KB

Fault tolerant permutation mapping in mu

✍ U. Maulik; S. Bandyopadhyay; S. Bhattacharyya 📂 Article 📅 2000 🏛 Elsevier Science 🌐 English ⚖ 142 KB

Fault-tolerant processor interconnection

✍ Makoto Imase; Terunao Soneoka; Keiji Okada 📂 Article 📅 1986 🏛 John Wiley and Sons 🌐 English ⚖ 724 KB