Memory Controllers for Mixed-Time-Criticality Systems: Architectures, Methodologies and Trade-offs

✍ Scribed by Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens (auth.)

Publisher: Springer International Publishing
Year: 2016
Tongue: English
Leaves: 225
Series: Embedded Systems
Edition: 1
Category: Library

No coin nor oath required. For personal study only.

✦ Synopsis

This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.

✦ Table of Contents

Front Matter....Pages i-xxvii
Introduction....Pages 1-16
Reconfigurable Real-Time Memory Controller Architecture....Pages 17-56
Memory Patterns....Pages 57-91
Cycle-Accurate SDRAM Power Modeling....Pages 93-109
Power/Performance Trade-Offs....Pages 111-124
Conservative Open-Page Policy....Pages 125-144
Reconfiguration....Pages 145-165
Related Work....Pages 167-182
Conclusions and Future Work....Pages 183-188
Back Matter....Pages 189-202

✦ Subjects

Circuits and Systems; Processor Architectures; Electronics and Microelectronics, Instrumentation

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