Logic simulation using interactive hardware
โ Scribed by L.C. Tong; S.F. Gourley
- Publisher
- Elsevier Science
- Year
- 1977
- Tongue
- English
- Weight
- 412 KB
- Volume
- 9
- Category
- Article
- ISSN
- 0010-4485
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โฆ Synopsis
A technique for improving the performance of a gate-level logic simulator through the use of interactive hardware is described. This technique not only reduces the program run-time and Increases the gate capacity of the simulator, but also enables the same simulator to be used directly for on-line logic circuit testing. The simulator and interactive hardware were designed and implemented on a PDPI 1/20 computer.
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