Logic and Computer Design Fundamentals

✍ Scribed by Diego Hanks

• Publisher: Diego Hanks
• Year: 2024
• Tongue: English
• Leaves: 235
• Category: Library

✦ Synopsis

"Embark on a comprehensive exploration of the foundational principles and practical applications of logic and computer design with this essential textbook. 'Logic and Computer Design Fundamentals: From Theory to Practice' provides a comprehensive introduction to the core concepts that underpin modern digital systems.

Beginning with the basics of Boolean algebra and logic gates, this book guides readers through the construction of digital circuits, covering both combinational and sequential logic. Readers will learn how to design and analyze logic circuits using tools such as flip-flops, registers, and counters, gaining a solid understanding of the building blocks of digital systems.

Moving beyond the basics, the book delves into more advanced topics such as memory devices, programmable logic devices (PLDs), and finite state machines. Readers will explore the design and implementation of microprocessors, including machine instructions, computer arithmetic, and assembly language programming.

'Logic and Computer Design Fundamentals' also covers key aspects of computer organization and architecture, including CPU design, instruction set architecture (ISA), memory systems, and input/output (I/O) systems. With a focus on practical application, the book provides insights into data path design, pipeline processing, and system-on-chip (SoC) architectures.

Whether you are a student or a practicing engineer, this book serves as an invaluable resource for understanding the theory and practice of logic and computer design. Featuring numerous examples, illustrations, and exercises, 'Logic and Computer Design Fundamentals: From Theory to Practice' equips readers with the knowledge and skills to design and analyze digital systems with confidence."

✦ Table of Contents

Logic and Computer Design Fundamentals
iii
3
The Digital Computer
Beyond the Computer
More on the Generic Computer
An Overview of the Digital Design Process
Binary Numbers
Octal and Hexadecimal Numbers
Number Ranges
Conversion from Decimal to Other Bases
ASCII Character Code
Parity Bit
37
Binary Logic
Logic Gates
HDL Representations of Gates
Basic Identities of Boolean Algebra
Algebraic Manipulation
Complement of a Function
Minterms and Maxterms
Sum of Products
Product of Sums
Cost Criteria
Map Structures
Two-Variable Maps
Three-Variable Maps
Essential Prime Implicants
Nonessential Prime Implicants
Product-of-Sums Optimization
Don’t-Care Conditions
Odd Function
Logic Synthesis
113
Value-Fixing, Transferring, and Inverting
Multiple-Bit Functions
Enabling
Decoder and Enabling Combinations
Decoder-Based Combinational Circuits
Priority Encoder
Encoder Expansion
Multiplexers
Multiplexer-Based Combinational Circuits
Half Adder
Full Adder
Binary Ripple Carry Adder
Complements
Subtraction Using 2s Complement
Signed Binary Numbers
Signed Binary Addition and Subtraction
Overflow
HDL Models of Adders
Behavioral Description
Contraction
Incrementing
Decrementing
Multiplication by Constants
Division by Constants
Zero Fill and Extension
197
SR and S R Latches
D Latch
Edge-Triggered Flip-Flop
Standard Graphics Symbols
Direct Inputs
Input Equations
State Table
State Diagram
Sequential Circuit Simulation
Design Procedure
Finding State Diagrams and State Tables
State Assignment
Designing with D Flip-Flops
Designing with Unused States
Verification
State-Machine Diagram Model
Constraints on Input Conditions
Design Applications Using State-Machine Diagrams
Integrated Circuits
295
CMOS Circuit Technology
Technology Parameters
Read-Only Memory
Programmable Logic Array
Programmable Array Logic Devices
Field Programmable Gate Array
323
Register with Parallel Load
Arithmetic Microoperations
Logic Microoperations
Shift Microoperations
Multiplexer-Based Transfers
Shift Registers
Ripple Counter
Synchronous Binary Counters
Other Counters
High-Impedance Outputs
Three-State Bus
Serial Addition
Design Procedure
403
Write and Read Operations
Timing Waveforms
Properties of Memory
Coincident Selection
DRAM Cell
DRAM Bit Slice
Synchronous DRAM (SDRAM)
Double-Data-Rate SDRAM (DDR SDRAM)
RAMBUS® DRAM (RDRAM)
433
Arithmetic Circuit
Logic Circuit
Arithmetic/Logic Unit
Barrel Shifter
Instruction Set Architecture
Storage Resources
Instruction Formats
Instruction Specifications
Instruction Decoder
Sample Instructions and Program
Single­Cycle Computer Issues
Sequential Control Design
485
Basic Computer Operation Cycle
Register Set
Three-Address Instructions
Two-Address Instructions
One-Address Instructions
Zero-Address Instructions
Addressing Architectures
Implied Mode
Immediate Mode
Register and Register-Indirect Modes
Direct Addressing Mode
Indirect Addressing Mode
Relative Addressing Mode
Indexed Addressing Mode
Summary of Addressing Modes
Stack Instructions
Independent versus Memory-Mapped I/O
Arithmetic Instructions
Logical and Bit-Manipulation Instructions
Shift Instructions
Arithmetic Operations
Biased Exponent
Standard Operand Format
Conditional Branch Instructions
Procedure Call and Return Instructions
Types of Interrupts
Processing External Interrupts
531
Execution of Pipeline Microoperations
Pipeline Programming and Performance
Instruction Set Architecture
Addressing Modes
Datapath Organization
Control Organization
Data Hazards
Control Hazards
ISA Modifications
Datapath Modifications
Control Unit Modifications
Microprogrammed Control
Microprograms for Complex Instructions
Advanced CPU Concepts
Recent Architectural Innovations
585
Keyboard
Hard Drive
Liquid Crystal Display Screen
I/O Transfer Rates
I/O Bus and Interface Unit
Example of I/O Interface
Strobing
Handshaking
Synchronous Transmission
The Keyboard Revisited
A Packet-Based Serial I/O Bus
Example of Program-Controlled Transfer
Interrupt-Initiated Transfer
Daisy Chain Priority
Parallel Priority Hardware
DMA Controller
DMA Transfer
619
Cache Mappings
Line Size
Cache Loading
Write Methods
Integration of Concepts
Instruction and Data Caches
Multiple-Level Caches
Page Tables
Translation Lookaside Buffer
Virtual Memory and Cache
648