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Linear-programming-based techniques for synthesis of network-on-chip architectures

✍ Scribed by Srinivasan, K.; Chatha, K.S.; Konjevod, G.

Book ID: 115538097
Publisher: IEEE
Year: 2006
Tongue: English
Weight: 777 KB
Volume: 14
Category: Article
ISSN: 1063-8210
DOI: 10.1109/tvlsi.2006.871762

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