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[Lecture Notes in Computer Science] Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation Volume 2451 || Modeling Propagation Delay of MUX, XOR, and D-Latch Source-Coupled Logic Gates

✍ Scribed by Hochet, Bertrand; Acosta, Antonio J.; Bellido, Manuel J.

Book ID: 120583319
Publisher: Springer Berlin Heidelberg
Year: 2002
Weight: 79 KB
Category: Article
ISBN: 354045716X
DOI: 10.1007/3-540-45716-X_43

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