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[Lecture Notes in Computer Science] Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation Volume 6951 || High Level Synthesis of Asynchronous Circuits from Data Flow Graphs

✍ Scribed by Ayala, José L.; García-Cámara, Braulio; Prieto, Manuel; Ruggiero, Martino; Sicard, Gilles

Book ID: 121719551
Publisher: Springer Berlin Heidelberg
Year: 2011
Weight: 450 KB
Category: Article
ISBN: 3642241549
DOI: 10.1007/978-3-642-24154-3_32

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