Knowledge-based circuit recognition from standard-cell design CMOS VLSI optical microscope images
✍ Scribed by Koji Nakamae; Shinji Yokoyama; Atsushi Onishi; Hiromu Fujioka
- Publisher
- John Wiley and Sons
- Year
- 1998
- Tongue
- English
- Weight
- 289 KB
- Volume
- 29
- Category
- Article
- ISSN
- 0882-1666
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✦ Synopsis
For the purpose of constructing a fault diagnosis assistance system based on the concept of so-called reverse engineering, we propose a circuit recognition system for CMOS circuits designed with the standard-cell design and manufactured with a two-level-metal-layer CMOS process. The standard-cell designed layout is composed of cell arrays and routing channels. The system recognizes a circuit by using a knowledge base that is built from features included in the standard-cell layout data and the observed optical microscope interconnection patterns. The knowledge base consists of a cell library, a polygon library, and a rule base. In the polygon library, a polygon in the layout data described in the GDS II format is changed into the description of a set of rectangles. An interconnection pattern extracted from a binary version of the observed image is also described as a set of rectangles. In order to distinguish between the 1st-layer Al interconnection and the 2nd-layer Al interconnection, we introduce a parameter called edge strength on each rectangle. The parameter indicates the degree of sharpness of the observed interconnection edge. From the extracted interconnection patterns and the knowledge base, we recognize cells in the cell array and connections between cells in the routing channel. Application of this system to part of a CMOS VLSI optical microscope image showed its validity. The total processing time was 306 s.