[Japan Soc. Applied Phys 1995 Symposium on VLSI Circuits. Digest of Technical Papers - Kyoto, Japan (8-10 June 1995)] Digest of Technical Papers., Symposium on VLSI Circuits. - Power-efficient metastability error reduction in CMOS flash A/D converters

[Japan Soc. Applied Phys 1995 Symposium

✍ Khorram, S.; Rofougaran, A.; Abidi, A.A. 📂 Article 📅 1995 🏛 Japan Soc. Applied Phys ⚖ 212 KB

[Japan Soc. Applied Phys 1995 Symposium

✍ Izumikawa, M.; Yamashina, M. 📂 Article 📅 1995 🏛 Japan Soc. Applied Phys ⚖ 211 KB

[Japan Soc. Applied Phys 1995 Symposium

✍ Shigematsu, S.; Mutoh, S.; Matsuya, Y.; Yamada, J. 📂 Article 📅 1995 🏛 Japan Soc. Applied Phys 🌐 English ⚖ 220 KB

[Japan Soc. Applied Phys 1995 Symposium

✍ Higuchi, H.; Tachibana, S.; Minami, M.; Nagano, T. 📂 Article 📅 1995 🏛 Japan Soc. Applied Phys ⚖ 271 KB

[Japan Soc. Applied Phys 1995 Symposium

✍ Ku, J.; Siu, S.; Yazdani, M.; Yolin Lih, ; Wei-Ping Lu, ; Desroches, A. 📂 Article 📅 1995 🏛 Japan Soc. Applied Phys ⚖ 227 KB

[Japan Soc. Applied Phys 1995 Symposium

✍ Narita, S.; Ishibashi, K.; Tachibana, S.; Norisue, K.; Shimazaki, Y.; Nishimoto, 📂 Article 📅 1995 🏛 Japan Soc. Applied Phys ⚖ 274 KB