Introduction to Reconfigurable Supercomputing (Synthesis Lectures on Computer Architecture)

✍ Scribed by Marco Lanzagorta, Stephen Bique, Robert Rosenberg

• Publisher: Morgan and Claypool Publishers
• Year: 2010
• Tongue: English
• Leaves: 103
• Series: Synthesis Lectures on Computer Architecture
• Category: Library

✦ Synopsis

This book covers technologies, applications, tools, languages, procedures, advantages, and disadvantages of reconfigurable supercomputing using Field Programmable Gate Arrays (FPGAs). The target audience is the community of users of High Performance Computers (HPC) who may benefit from porting their applications into a reconfigurable environment. As such, this book is intended to guide the HPC user through the many algorithmic considerations, hardware alternatives, usability issues, programming languages, and design tools that need to be understood before embarking on the creation of reconfigurable parallel codes. We hope to show that FPGA acceleration, based on the exploitation of the data parallelism, pipelining and concurrency remains promising in view of the diminishing improvements in traditional processor and system design. Table of Contents: FPGA Technology / Reconfigurable Supercomputing / Algorithmic Considerations / FPGA Programming Languages / Case Study: Sorting / Alternative Technologies and Concluding Remarks

✦ Table of Contents

Introduction......Page 13
search.c......Page 18
ASIC vs. FPGA......Page 19
Logic Blocks......Page 20
The Interconnect......Page 23
Memory and I/O......Page 24
Reconfigurable Programming and FPGA Configuration......Page 25
Placement......Page 26
The Xilinx FPGA......Page 27
Authors' Biographies......Page 28
NRL Cray XD1......Page 30
Cray API......Page 31
Disadvantages......Page 35
Data Parallelism, Pipelining, and Concurrency......Page 36
Algorithmic Requirements......Page 37
I/O Considerations......Page 38
Loop Structure......Page 39
Effective Reconfigurable Algorithm Design......Page 40
Summary......Page 41
FPGA Programming Languages......Page 43
VHDL......Page 44
DSPLogic......Page 46
Handel-C......Page 47
Celoxica Example......Page 52
Mitrion-C......Page 53
Case Study: Sorting......Page 57
Concurrent Sorts......Page 59
Pipelining Bubblesort......Page 61
A 2-Way Selection Sort Implementation......Page 62
Parallel Bubblesort......Page 65
Counting Sort......Page 67
Simulation......Page 69
Memory Conventions and Interfaces......Page 71
Generating Logic and Running Codes......Page 72
Alternative Technologies......Page 75
Concluding Remarks......Page 77