𝔖 Bobbio Scriptorium

✦ LIBER ✦

Interconnect and circuit modeling techniques for full-chip power supply noise analysis

✍ Scribed by Chen, H.H.; Neely, J.S.

Book ID: 114561981
Publisher: IEEE
Year: 1998
Tongue: English
Weight: 328 KB
Volume: 21
Category: Article
ISSN: 1070-9894
DOI: 10.1109/96.704931

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Circuits and techniques for high-resolut

Circuits and techniques for high-resolution measurement of on-chip power supply noise

✍ Alon, E.; Stojanovic, V.; Horowitz, M.A. 📂 Article 📅 2005 🏛 IEEE 🌐 English ⚖ 570 KB

A Built-in Technique for Measuring Subst

A Built-in Technique for Measuring Substrate and Power-Supply Digital Switching Noise Using PMOS-Based Differential Sensors and a Waveform Sampler in System-on-Chip Applications

✍ Iorga, C.; Yi-Chang Lu; Dutton, R.W. 📂 Article 📅 2007 🏛 IEEE 🌐 English ⚖ 471 KB

[IEEE APCCAS 2006 - 2006 IEEE Asia Pacif

[IEEE APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - Singapore (2006.12.4-2006.12.7)] APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - Fourier Series Analysis for Nonlinearities Due to the Power Supply Noise in Open-Loop Class D Amplifiers

✍ Shu, Wei; Chang, Joseph S.; Ge, Tong; Tan, Meng Tong 📂 Article 📅 2006 🏛 IEEE ⚖ 189 KB

[IEEE IEEE International Conference on S

[IEEE IEEE International Conference on Simulation of Semiconductor Processes and Devices - Boston, MA, USA (2003.09.3-2003.09.5)] International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003. - A novel technique for full-wave modeling of large-scale three-dimensional high-speed on/off-chip interconnect structures

✍ Jiao, D.; Mazumder, M.; Chakravarty, S.; Dai, C.; Kobrinsky, M.J.; Harmes, M.C.; 📂 Article 📅 2003 🏛 IEEE 🌐 English ⚖ 424 KB