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Ink-Jet Printing, Self-Assembled Polyelectrolytes, and Electroless Plating: Low Cost Fabrication of Circuits on a Flexible Substrate at Room Temperature

✍ Scribed by Kevin Cheng; Ming-Huan Yang; Wanda W. W. Chiu; Chieh-Yi Huang; Jane Chang; Tai-Fa Ying; Yang Yang


Publisher
John Wiley and Sons
Year
2005
Tongue
English
Weight
653 KB
Volume
26
Category
Article
ISSN
1022-1336

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✦ Synopsis


Abstract

Summary: The driving forces behind the development of flexible electronics are their flexibility, lightweightedness, and potential for low‐cost manufacturing. However, because of physical limitations, traditional thermal processes cause deformations in the flexible substrate. As a result, the adhesion quality of the printed wires is deteriorated. This article reviews recent developments in printing circuits on a flexible substrate by combining self‐assembled polyelectrolytes, ink‐jet printing of a catalyst, and electroless plating of metals. The limitations and potential applications of this technology are also discussed. Experiments implementing this technology demonstrated significant results. By a vibration‐induced assistance during an ink‐jet printing catalyst process, line width and blurring can be controlled to within ±3% variation. Following the IPC 6013 standard for flexible electronics, the results after thermal cycling (288 °C, 6 times) and a hot oil test (260 °C, 3 times) indicated that the metallic circuit had retained excellent adhesion properties and electric characteristics. We also report the first successful demonstration of a metal film in a via‐hole inner wall on a flexible substrate. This novel fabrication method is ideal for the realization of large area, flexible electronics and future multilayer flexible substrate application, such as flexible display, chip on flexible substrate, etc., particularly where traditional lithographic processes can not be applied.

Flexible high‐density circuit on an FR‐4 substrate (left) and picture of via hole with copper inner wall (right).

magnified imageFlexible high‐density circuit on an FR‐4 substrate (left) and picture of via hole with copper inner wall (right).