Implementation of a low-cost phase-locked loop clock-recovery module for 40-Gb/s optical receivers
✍ Scribed by Dong Sik Woo; Kang Wook Kim; Sang-Kyu Lim; Jesoo Ko
- Publisher
- John Wiley and Sons
- Year
- 2005
- Tongue
- English
- Weight
- 430 KB
- Volume
- 48
- Category
- Article
- ISSN
- 0895-2477
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✦ Synopsis
Abstract
A low‐cost, compact, high‐performance clock‐recovery (CR) module using a new phase‐locked loop (PLL) for 40‐Gb/s optical receivers is successfully designed and implemented. The newly implemented frequency detector in the PLL helps to reduce the current consumption and also extended the frequency‐capture range. The implemented PLL clock‐recovery module demonstrates advantages over the conventional open‐loop type clock‐recovery module with a DR filter by significantly improving clock jitter, thus reducing overall module cost, and allowing the possibility of providing a proper clock signal in the case of temporary loss of NRZ input signals. The CR module exhibits error‐free operation during a 30‐min BER test with a time‐division‐multiplexing (TDM) 40‐Gb/s transmission system. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 48: 312–315, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.21335