Impact of the variable output resistance on the transient response of LC transmission line CMOS buffers and its model
✍ Scribed by Gregorio Cappuccino; Felice Crupi; Andrea Pugliese
- Publisher
- John Wiley and Sons
- Year
- 2007
- Tongue
- English
- Weight
- 293 KB
- Volume
- 49
- Category
- Article
- ISSN
- 0895-2477
No coin nor oath required. For personal study only.
✦ Synopsis
Abstract
The work focuses on the impact of the finite and variable MOSFET output resistance on the transient response LC transmission line drivers. Experimental results highlight the severe error occurring in conventional timing analysis when actual finite resistance of the device is neglected. A novel analytical model is presented to capture the variable resistance of the driver. The model allows closed‐form expressions for the output waveform to be carried out, and it agrees well with HSPICE simulations. The proposed model is suitable to figure fundamental timing parameters of CMOS gates driving lossless transmission lines, such as the propagation delay, transition time, as well as power estimation. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 1504–1509, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.22496