Image processing on a reconfigurable array of processors with wider bus networks

✍ Scribed by Shung-Shing Lee; Shi-Jinn Horng; Horng-Ren Tsai; Yu-Hua Lee

• Publisher: Elsevier Science
• Year: 1997
• Tongue: English
• Weight: 775 KB
• Volume: 30
• Category: Article
• ISSN: 0031-3203
• DOI: 10.1016/s0031-3203(96)00175-6

✦ Synopsis

Based on the reconfigurable array of processors with wider bus networks, we propose a series of algorithms for image processing. Conventionally, only one bus is connected between two processors but in this machine it has a set of buses. Such a characteristic increases the computation power of this machine greatly. Based on the base-m number system, we first introduce some basic operation algorithms. Then three related applications are derived in constant time: (1) the histogram of an image, (2) the image segmentation, and (3) the image labeling.