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[IEEE Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004. - Geneva, Switzerland (28-30 June 2004)] Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004. - Systemc model of a MPEG-2 DVB-T bit-rate measurement architecture for FPGA implementation

✍ Scribed by Tanougast, C.; Berviller, Y.; Mannino, C.; Rabah, H.; Janiaut, M.; Weber, S.

No coin nor oath required. For personal study only.

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