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[IEEE IEEE Custom Integrated Circuits Conference - CICC '94 - San Diego, CA, USA (1-4 May 1994)] Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94 - A 1.5% jitter PLL clock generation system for a 500-MHz RISC processor

✍ Scribed by Igura, H.; Suzuki, K.; Nakayama, T.; Izumikawa, M.; Nomura, M.; Guto, J.; Inoue, T.; Abiko, H.; Okabe, K.; Ono, A.; Yamashima, M.; Yamada, H.

Book ID: 121211873
Publisher: IEEE
Year: 1994
Weight: 214 KB
Category: Article
ISBN-13: 9780780318861
DOI: 10.1109/CICC.1994.379661

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