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[IEEE ESSCIRC 2012 - 38th European Solid State Circuits Conference - Bordeaux, France (2012.09.17-2012.09.21)] 2012 Proceedings of the ESSCIRC (ESSCIRC) - A ring-VCO-based sub-sampling PLL CMOS circuit with −119 dBc/Hz phase noise and 0.73 ps jitter

✍ Scribed by Sogo, Kenta; Toya, Akihiro; Kikkawa, Takamaro


Book ID
120710239
Publisher
IEEE
Year
2012
Weight
649 KB
Category
Article
ISBN
1467322113

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