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[IEEE ESSCIRC 2004 - 29th European Solid-State Circuits Conference - Estoril, Portugal (16-18 Sept. 2003)] ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705) - A 9-16Gb/s clock and data recovery circuit with three-state phase detector and dual-path loop architecture

✍ Scribed by Rezayee, A.; Martin, K.

Book ID: 125331912
Publisher: IEEE
Year: 2003
Tongue: English
Weight: 303 KB
Category: Article
ISBN-13: 9780780379954
DOI: 10.1109/ESSCIRC.2003.1257227

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