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[IEEE Electrical Performance of Electronic Packaging - Austin, TX (2004.10.27-2004.10.27)] Electrical Performance of Electronic Packaging IWCE-04 - Simulations of sub-100nm strained Si MOSFETs with high-k gate stacks

✍ Scribed by Yang, ; Watling, ; Adam-Lema, ; Asenov, ; Barker,

Book ID: 126729857
Publisher: IEEE
Year: 2004
Weight: 138 KB
Category: Article
ISBN-13: 9780780386495
DOI: 10.1109/IWCE.2004.1407303

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