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[IEEE Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005. - Kyoto, Japan (June 16-18, 2005)] Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005. - 4.0GHz 0.18μm CMOS PLL based on an interpolative oscillator

✍ Scribed by Gebara, F.H.; Schaub, J.D.; Drake, A.J.; Nowka, K.J.; Brown, R.B.

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