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[IEEE Conference of Asia and South Pacific Design Automation 2003 - Kitakyushu, Japan (21-24 Jan. 2003)] Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. - Efficient LUT-based FPGA technology mapping for power minimization

✍ Scribed by Hao Li, ; Wai-Kei Mak, ; Katkoori, S.

Book ID: 126735757
Publisher: IEEE
Year: 2003
Tongue: English
Weight: 555 KB
Category: Article
ISBN-13: 9780780376595
DOI: 10.1109/ASPDAC.2003.1195040

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