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[IEEE Computer Soc Proceedings. 18th International Conference on VLSI Design - Kolkata, India (3-7 Jan. 2005)] 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design - Heterogeneous and multi-level compression techniques for test volume reduction in systems-on-chip

โœ Scribed by Lingapan, L.; Ravi, S.; Raghunathan, A.; Jha, N.K.; Chakradhar, S.T.


Book ID
118054667
Publisher
IEEE Computer Soc
Year
2005
Tongue
English
Weight
256 KB
Volume
0
Category
Article
ISBN-13
9780769522647

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โœฆ Synopsis


A January 2005 conference fostered interaction between the domains of system architecture, logic and circuit design, and device fabrication. Design automation, embedded systems design, rapid prototyping, and embedded software design were some other themes. Papers from the conference focus on power-aware design of VLSI systems. They are presented here in sections on physical design, embedded systems, low power, formal verification, nanotechnology and biochips, synthesis, RF and mixed signal, and signal integrity and crosstalk. Other sections cover design methodology, placement and routing, power estimation, interconnect, and algorithms. There is no subject index. Annotation ยฉ2004 Book News, Inc., Portland, OR


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