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[IEEE Comput. Soc 2002 IEEE International Conference on Computer Design - Freiberg, Germany (16-18 Sept. 2002)] Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors - Floating-point fused multiply-add with reduced latency

✍ Scribed by Lang, T.; Bruguera, J.D.

Book ID: 120179226
Publisher: IEEE Comput. Soc
Year: 2002
Weight: 304 KB
Category: Article
ISBN-13: 9780769517001
DOI: 10.1109/ICCD.2002.1106762

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