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[IEEE Comput. Soc 14th Symposium on Computer Arithmetic - Adelaide, SA, Australia (14-16 April 1999)] Proceedings 14th IEEE Symposium on Computer Arithmetic (Cat. No.99CB36336) - Efficient VLSI implementation of modulo (2/sup n/±1) addition and multiplication

✍ Scribed by Zimmermann, R.

Book ID: 121734729
Publisher: IEEE Comput. Soc
Year: 1999
Tongue: English
Weight: 209 KB
Edition: 1999
Category: Article
ISBN-13: 9780769501161
DOI: 10.1109/ARITH.1999.762841

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