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[IEEE ASP-DAC 2005. Asia and South Pacific Design Automation Conference 2005 - Shanghai, China (18-21 Jan. 2005)] Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005. - Using GALS architecture to reduce the impact of long wire delay on FPGA performance

✍ Scribed by Xin Jia, ; Vemuri, R.

Book ID: 126757242
Publisher: IEEE
Year: 2005
Weight: 703 KB
Volume: 2
Category: Article
ISBN-13: 9780780387362
DOI: 10.1109/ASPDAC.2005.1466572

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