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[IEEE APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) - Macao, China (2008.11.30-2008.12.3)] APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems - Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2n,2n+1−1,2n−1)

✍ Scribed by Su-Hon Lin, ; Ming-Hwa Sheu, ; Chao-Hsiang Wang, ; Yuan-Ching Kuo,

Book ID: 121819711
Publisher: IEEE
Year: 2008
Weight: 513 KB
Category: Article
ISBN: 1424423414
DOI: 10.1109/APCCAS.2008.4745987

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