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[IEEE 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Bangalore, India (2007.01.6-2007.01.10)] 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Variability Driven Joint Leakage-Delay Optimization Through Gate Sizing with Provabale Convergence

✍ Scribed by Dobhal, Ashish; Khandelwal, Vishal; Davoodi, Azadeh; Srivastava, Ankur

Book ID: 126724119
Publisher: IEEE
Year: 2007
Weight: 381 KB
Category: Article
ISBN-13: 9780769527628
DOI: 10.1109/VLSID.2007.176

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