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[IEEE 2014 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2014.4.28-2014.4.30)] Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test - SAT-based complete logic implication with application to logic optimization

✍ Scribed by Chen, Yung-Chih; Ji, Kung-Ming

Book ID: 127111025
Publisher: IEEE
Year: 2014
Weight: 552 KB
Category: Article
ISBN: 1479927767
DOI: 10.1109/vlsi-dat.2014.6834869

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