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[IEEE 2014 International Symposium on Next-Generation Electronics (ISNE) - Kwei-Shan Tao-Yuan, Taiwan (2014.5.7-2014.5.10)] 2014 International Symposium on Next-Generation Electronics (ISNE) - Simultaneous data path synthesis and clock skew scheduling for leakage and glitch power minimization

✍ Scribed by Liao, Hao-Wei; Huang, Shih-Hsu; Yeh, Hua-Hsin; Tu, Wen-Pin

Book ID: 125516646
Publisher: IEEE
Year: 2014
Weight: 313 KB
Category: Article
ISBN: 1479947806
DOI: 10.1109/ISNE.2014.6839356

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