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[IEEE 2013 International Soc Design Conference (ISOCC) - Busan, South Korea (2013.11.17-2013.11.19)] 2013 International SoC Design Conference (ISOCC) - Verilog synthesis of USB 2.0 full-speed device PHY IP

✍ Scribed by Shin, Kee-Bum; Seong, Ki-Hwan; Yeo, Dong-Hee; Kim, Byungsub; Sim, Jae-Yoon; Park, Hong June

Book ID: 126995644
Publisher: IEEE
Year: 2013
Weight: 360 KB
Category: Article
ISBN: 1479911429
DOI: 10.1109/isocc.2013.6863961

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